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ACSD
2007
IEEE
88views Hardware» more  ACSD 2007»
14 years 5 months ago
Testing the executability of scenarios in general inhibitor nets
In this paper we introduce executions of place/transition Petri nets with weighted inhibitor arcs (PTI-net) as enabled labeled stratified order structures (LSOs) and present a po...
Robert Lorenz, Sebastian Mauser, Robin Bergenthum
ACSD
2007
IEEE
103views Hardware» more  ACSD 2007»
14 years 5 months ago
Output-Determinacy and Asynchronous Circuit Synthesis
Signal Transition Graphs (STG) are a formalism for the description of asynchronous circuit behaviour. In this paper we propose (and justify) a formal semantics of nondeterministic...
Victor Khomenko, Mark Schäfer, Walter Vogler
ACSD
2007
IEEE
97views Hardware» more  ACSD 2007»
14 years 5 months ago
Towards Hilbertian Formal Methods
Marius C. Bujorianu, Manuela L. Bujorianu