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VTS
2007
IEEE
135views Hardware» more  VTS 2007»
14 years 5 months ago
High Level Synthesis of Degradable ASICs Using Virtual Binding
—As the complexity of the integrated circuits increases, they become more susceptible to manufacturing faults, decreasing the total process yield. Thus, it would be desirable to ...
Nima Honarmand, A. Shahabi, Hasan Sohofi, Maghsoud...