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DATE
2000
IEEE
134views Hardware» more  DATE 2000»
13 years 12 months ago
An on Chip ADC Test Structure
In this paper, a new built-in self-test structure to test the static specifications of analog to digital converters (ADCs) is presented. A ramp signal generated by an integrator ...
Yun-Che Wen, Kuen-Jong Lee
ETS
2006
IEEE
106views Hardware» more  ETS 2006»
14 years 1 months ago
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC
In this paper, complex mixed signal circuits such as SiP or SOC including several ADCs and DACs are considered. A new DFT technique is proposed allowing the test of this complete ...
Vincent Kerzerho, Philippe Cauvet, Serge Bernard, ...
GLOBECOM
2009
IEEE
14 years 2 months ago
Practical Evaluation of Opportunistic Error Correction
—In [1], we have proposed a novel cross-layer scheme based on resolution adaptive ADCs and fountain codes for the OFDM systems to lower the power consumption in ADCs. The simulat...
Xiaoying Shao, Cornelis H. Slump