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    1999
    IEEE
    110views Hardware» more  ASYNC 1999»
    Verification of Delayed-Reset Domino Circuits Using ATACS
    14 years 7 months ago
    Verification of Delayed-Reset Domino Circuits Using ATACS
    Download  www.async.ece.utah.edu
    This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
    Wendy Belluomini, Chris J. Myers, H. Peter Hofstee
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