To fill the gap between increasing demand for reconfigurability and performance efficiency, CGRAs are seen to be an emerging platform. In this paper, a new architecture, QUKU, is d...
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
Abstract. We propose the multiple LUT cascade as a means to configure an ninput LPM (Longest Prefix Match) address generator commonly used in routers to determine the output port g...
Abstract. We describe a new approach for creating hardware description language (HDL) specifications for custom instructions, to form part of the instruction-set architecture (ISA)...
Abstract. Virtual channel reservation is a simple approach for providing guaranteed throughput services in a virtual channel network-on-chip. However, its performance is limited by...
Nikolay Kavaldjiev, Gerard J. M. Smit, Pascal T. W...