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    VLSID
    1993
    IEEE
    133views VLSI» more  VLSID 1993»
    An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
    14 years 3 months ago
    An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
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    An area-eficzent systolic architecture for realtime, programmable-coeBcient jinite impulse response (FIR)filters is presented. A technique called pipelined clustering is introduce...
    V. Visvanathan, Nibedita Mohanty, S. Ramanathan
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