ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
In this paper, we analyze the theoretical delay bound of the SHA-1 algorithm and propose architectures to achieve high throughput hardware implementations which approach this boun...
ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...
ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
This paper proposes different low-cost coprocessors for public key authentication on 8-bit smart cards. Elliptic curve cryptography is used for its efficiency per bit of key and ...
ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
In the simulation of quantum circuits the matrices and vectors used to represent unitary operations and qubit states grow exponentially as the number of qubits increase. For insta...
ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
Abstract – The storage requirements in data-dominant signal processing systems, whose behavior is described by arraybased, loop-organized algorithmic specifications, have an imp...
ASAP
2006
IEEE
14 years 5 months ago
2006
IEEE
