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ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
14 years 6 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 6 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
ASAP
2008
IEEE
128views Hardware» more  ASAP 2008»
14 years 6 months ago
Low discrepancy sequences for Monte Carlo simulations on reconfigurable platforms
Ishaan L. Dalal, Deian Stefan, Jared Harwayne-Gida...
ASAP
2008
IEEE
96views Hardware» more  ASAP 2008»
14 years 6 months ago
Integer and floating-point constant multipliers for FPGAs
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
Nicolas Brisebarre, Florent de Dinechin, Jean-Mich...
ASAP
2008
IEEE
110views Hardware» more  ASAP 2008»
14 years 6 months ago
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures
Cooperative MIMO is a new technique that allows disjoint wireless communication nodes (e.g. wireless sensors) to form a virtual antenna array to increase bandwidth, reliability an...
Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T....
ASAP
2008
IEEE
93views Hardware» more  ASAP 2008»
14 years 6 months ago
Memory copies in multi-level memory systems
Data movement operations, such as the C-style memcpy function, are often used to duplicate or communicate data. This type of function typically produces a significant amount of o...
Pepijn J. de Langen, Ben H. H. Juurlink
ASAP
2008
IEEE
82views Hardware» more  ASAP 2008»
14 years 6 months ago
Run-time thread sorting to expose data-level parallelism
We address the problem of data parallel processing for computational quantum chemistry (CQC). CQC is a computationally demanding tool to study the electronic structure of molecule...
Tirath Ramdas, Gregory K. Egan, David Abramson, Ki...
ASAP
2008
IEEE
186views Hardware» more  ASAP 2008»
14 years 6 months ago
Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...
Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberla...
ASAP
2008
IEEE
118views Hardware» more  ASAP 2008»
14 years 6 months ago
Bit matrix multiplication in commodity processors
Registers in processors generally contain words or, with the addition of multimedia extensions, short vectors of subwords of bytes or 16-bit elements. In this paper, we view the c...
Yedidya Hilewitz, Cédric Lauradoux, Ruby B....