ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper introduces two new high-speed quasi delay insensitive (QDI) asynchronous pipeline templates. These new high throughput templates support complex non-linear pipeline str...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
We demonstrate how 1-of-n encoded speed-independent circuits provide a good framework for constructing smart card functions that are resistant to side channel attacks and fault in...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
We present a method for synchronizing pausible clocks in GALS (Globally Asynchronous, Locally Synchronous) systems. In contrast to most conventional GALS schemes the method is not...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
Events in self-timed rings can propagate evenly spaced or as bursts. By studying these phenomena, we obtain a better understanding of the underlying dynamics of self-timed pipelin...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper presents a novel variation of wave pipelining that we call “surfing.” In previous wave pipelined designs, timing uncertainty grows monotonically as events propagat...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
For application in a software defined radio a CORDIC processor has been developed that can operate both in synchronous and asynchronous mode. Each mode of operation has advantages...