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31
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VLSID
1997
IEEE
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VLSI
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VLSID 1997
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Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs
14 years 3 months ago
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An exclusive-OR transform of input variables significantly reduces the size of the PLA implementation for adder and comparator circuits. For n bit adder circuits, the size of PLA ...
James Jacob, P. Srinivas Sivakumar, Vishwani D. Ag...
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