Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...
We present a silicon-on-insulator (SOI) pass-transistor logic (PTL) gate with an active body bias control circuit and compare the proposed PTL gate with other types of PTL gates w...
— Process variations and temperature variations can cause both the frequency and the leakage of the chip to vary significantly from their expected values, thereby decreasing the...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
Post-fabrication tuning for mitigating manufacturing variability is receiving a significant attention. To reduce leakage increase involved in performance compensation by body bia...