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SBACPAD
2006
IEEE
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14 years 1 months ago
Controlling the Power and Area of Neural Branch Predictors for Practical Implementation in High-Performance Processors
Neural-inspired branch predictors achieve very low branch misprediction rates. However, previously proposed implementations have a variety of characteristics that make them challe...
Daniel A. Jiménez, Gabriel H. Loh
ISPASS
2006
IEEE
14 years 1 months ago
Branch trace compression for snapshot-based simulation
We present a scheme to compress branch trace information for use in snapshot-based microarchitecture simulation. The compressed trace can be used to warm any arbitrary branch pred...
Kenneth C. Barr, Krste Asanovic
HIPEAC
2007
Springer
14 years 1 months ago
Branch History Matching: Branch Predictor Warmup for Sampled Simulation
Computer architects and designers rely heavily on simulation. The downside of simulation is that it is very time-consuming — simulating an industry-standard benchmark on todayâ€...
Simon Kluyskens, Lieven Eeckhout
CSIE
2009
IEEE
14 years 2 months ago
A Computation Saving Partial-Sum-Global-Update Scheme for Perceptron Branch Predictor
With the pipeline deepen and issue width widen, the accuracy of branch predictor becomes more and more important to the performance of a microprocessor. State-of-theart researches...
Liqiang He
ISPASS
2009
IEEE
14 years 2 months ago
Experiment flows and microbenchmarks for reverse engineering of branch predictor structures
Insights into branch predictor organization and operation can be used in architecture-aware compiler optimizations to improve program performance. Unfortunately, such details are ...
Vladimir Uzelac, Aleksandar Milenkovic
HPCA
2002
IEEE
14 years 8 months ago
Power Issues Related to Branch Prediction
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco B...