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ICCAD
1999
IEEE
98views Hardware» more  ICCAD 1999»
14 years 3 months ago
Buffer block planning for interconnect-driven floorplanning
This paper studies buffer block planning for interconnect-driven floorplanning in deep submicron designs. We first introduce the concept of feasible region (FR) for buffer inserti...
Jason Cong, Tianming Kong, David Zhigang Pan