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    CAL
    2002
    105views Software Engineering» more  CAL 2002»
    Worst-case Traffic for Oblivious Routing Functions
    14 years 8 days ago
    Worst-case Traffic for Oblivious Routing Functions
    Download  cva.stanford.edu
    This paper presents an algorithm to find a worst-case traffic pattern for any oblivious routing algorithm on an arbitrary interconnection network topology. The linearity of channe...
    Brian Towles, William J. Dally
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    CAL
    2002
    98views Software Engineering» more  CAL 2002»
    Page-Level Behavior of Cache Contention
    14 years 8 days ago
    Page-Level Behavior of Cache Contention
    Download  www.cs.virginia.edu
    Cache misses in small, limited-associativity primary caches very often replace live cache blocks, given the dominance of capacity and conflict misses. Towards motivating novel cach...
    Siddhartha V. Tambat, Sriram Vajapeyam
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    CAL
    2002
    88views Software Engineering» more  CAL 2002»
    Migration in Single Chip Multiprocessors
    14 years 8 days ago
    Migration in Single Chip Multiprocessors
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    Global communication costs in future single-chip multiprocessors will increase linearly with distance. In this paper, we revisit the issues of locality and load balance in order to...
    K. A. Shaw, William J. Dally
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    CAL
    2002
    89views Software Engineering» more  CAL 2002»
    Power-efficient Interconnection Networks: Dynamic Voltage Scaling with Links
    14 years 8 days ago
    Power-efficient Interconnection Networks: Dynamic Voltage Scaling with Links
    Download  www.cs.berkeley.edu
    Li Shang, Li-Shiuan Peh, Niraj K. Jha
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    CAL
    2002
    128views Software Engineering» more  CAL 2002»
    MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
    14 years 8 days ago
    MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
    Download  www.arctic.umn.edu
    Abstract-- Computer architects must determine how to most effectively use finite computational resources when running simulations to evaluate new architectural ideas. To facilitate...
    A. J. KleinOsowski, David J. Lilja
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    CAL
    2002
    94views Software Engineering» more  CAL 2002»
    Implementing Decay Techniques using 4T Quasi-Static Memory Cells
    14 years 8 days ago
    Implementing Decay Techniques using 4T Quasi-Static Memory Cells
    Download  www.cs.virginia.edu
    Abstract-This paper proposes the use of four-transistor (4T) cache and branch predictor array cell designs to address increasing worries regarding leakage power dissipation. While ...
    Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin...
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    CAL
    2002
    107views Software Engineering» more  CAL 2002»
    Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example
    14 years 8 days ago
    Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example
    Download  www.cs.virginia.edu
    Embedded systems commonly execute one program for their lifetime. Designing embedded system architectures with configurable components, such that those components can be tuned to t...
    Ann Gordon-Ross, Susan Cotterell, Frank Vahid
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    CAL
    2002
    108views Software Engineering» more  CAL 2002»
    A Low Power TLB Structure for Embedded Systems
    14 years 8 days ago
    A Low Power TLB Structure for Embedded Systems
    Download  www.cs.virginia.edu
    Jin-Hyuck Choi, Jung-Hoon Lee, Seh-Woong Jeong, Sh...
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