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    CAL
    2006
    98views Software Engineering» more  CAL 2006»
    A Case for Compressing Traces with BDDs
    13 years 11 months ago
    A Case for Compressing Traces with BDDs
    Download  liberty.princeton.edu
    Instruction-level traces are widely used for program and hardware analysis. However, program traces for just a few seconds of execution are enormous, up to several terabytes in siz...
    Graham D. Price, Manish Vachharajani
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    CAL
    2006
    99views Software Engineering» more  CAL 2006»
    Subtleties of Transactional Memory Atomicity Semantics
    13 years 11 months ago
    Subtleties of Transactional Memory Atomicity Semantics
    Download  www.cis.upenn.edu
    Abstract-- Transactional memory has great potential for simplifying multithreaded programming by allowing programmers to specify regions of the program that must appear to execute ...
    Milo M. K. Martin, Colin Blundell, E. Lewis
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    CAL
    2006
    79views Software Engineering» more  CAL 2006»
    From sequential programs to concurrent threads
    13 years 11 months ago
    From sequential programs to concurrent threads
    Download  liberty.princeton.edu
    Chip multiprocessors are of increasing importance due to recent difficulties in achieving higher clock frequencies in uniprocessors, but their success depends on finding useful wor...
    Guilherme Ottoni, Ram Rangan, Adam Stoler, Matthew...
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    CAL
    2006
    130views Software Engineering» more  CAL 2006»
    Adopting system call based address translation into user-level communication
    13 years 11 months ago
    Adopting system call based address translation into user-level communication
    Download  calab.kaist.ac.kr
    User-level communication alleviates the software overhead of the communication subsystem by allowing applications to access the network interface directly. For that purpose, effici...
    Moon-Sang Lee, Sang-Kwon Lee, Joonwon Lee, Seung R...
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    CAL
    2006
    100views Software Engineering» more  CAL 2006»
    User-Driven Frequency Scaling
    13 years 11 months ago
    User-Driven Frequency Scaling
    Download  empathicsystems.org
    Abstract-- We propose and evaluate User-Driven Frequency Scaling (UDFS) for improved power management on processors that support Dynamic Voltage and Frequency Scaling (DVFS), e.g, ...
    Arindam Mallik, Bin Lin, Gokhan Memik, Peter A. Di...
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    CAL
    2006
    110views Software Engineering» more  CAL 2006»
    A Page-based Hybrid (Software-Hardware) Dynamic Memory Allocator
    13 years 11 months ago
    A Page-based Hybrid (Software-Hardware) Dynamic Memory Allocator
    Download  www.csrl.unt.edu
    Modern programming languages often include complex mechanisms for dynamic memory allocation and garbage collection. These features drive the need for more efficient implementation ...
    Wentong Li, Saraju P. Mohanty, Krishna M. Kavi
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    CAL
    2006
    122views Software Engineering» more  CAL 2006»
    An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation
    13 years 11 months ago
    An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation
    Download  www.ee.unlv.edu
    Multiple core designs have become commonplace in the processor market, and are hence a major focus in modern computer architecture research. Thus, for both product development and ...
    James Donald, Margaret Martonosi
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    CAL
    2006
    117views Software Engineering» more  CAL 2006»
    A case for fault tolerance and performance enhancement using chip multi-processors
    13 years 11 months ago
    A case for fault tolerance and performance enhancement using chip multi-processors
    Download  www.ee.unlv.edu
    This paper makes a case for using multi-core processors to simultaneously achieve transient-fault tolerance and performance enhancement. Our approach is extended from a recent late...
    Huiyang Zhou
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    CAL
    2006
    89views Software Engineering» more  CAL 2006»
    Probabilistic counter updates for predictor hysteresis and bias
    13 years 11 months ago
    Probabilistic counter updates for predictor hysteresis and bias
    Download  www.cs.virginia.edu
    Hardware predictor designers have incorporated hysteresis and/or bias to achieve desired behavior by increasing the number of bits per counter. Some resulting proposed predictor de...
    Nicholas Riley, Craig B. Zilles
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    CAL
    2008
    125views Software Engineering» more  CAL 2008»
    Pipelined Architecture for Multi-String Matching
    13 years 11 months ago
    Pipelined Architecture for Multi-String Matching
    Download  cial.csie.ncku.edu.tw
    We present a pipelined approach to hardware implementation of the Aho-Corasick (AC) algorithm for string matching called P-AC. By incorporating pipelined processing, the state grap...
    Derek Chi-Wai Pao, Wei Lin, Bin Liu
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