Sciweavers

CAL
2008
13 years 11 months ago
Transaction-Aware Network-on-Chip Resource Reservation
Packet-switched interconnect fabric, widely viewed as the de facto on-chip data communication standard in the many-core era, offers high throughput and excellent scalability. Howev...
Zheng Li, Changyun Zhu, Li Shang, Robert P. Dick, ...
CAL
2007
14 years 7 days ago
CIM: A Reliable Metric for Evaluating Program Phase Classifications
Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja,...
CAL
2002
14 years 8 days ago
Worst-case Traffic for Oblivious Routing Functions
This paper presents an algorithm to find a worst-case traffic pattern for any oblivious routing algorithm on an arbitrary interconnection network topology. The linearity of channe...
Brian Towles, William J. Dally
CAL
2002
14 years 8 days ago
Page-Level Behavior of Cache Contention
Cache misses in small, limited-associativity primary caches very often replace live cache blocks, given the dominance of capacity and conflict misses. Towards motivating novel cach...
Siddhartha V. Tambat, Sriram Vajapeyam
CAL
2002
14 years 8 days ago
Migration in Single Chip Multiprocessors
Global communication costs in future single-chip multiprocessors will increase linearly with distance. In this paper, we revisit the issues of locality and load balance in order to...
K. A. Shaw, William J. Dally
CAL
2002
14 years 8 days ago
MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
Abstract-- Computer architects must determine how to most effectively use finite computational resources when running simulations to evaluate new architectural ideas. To facilitate...
A. J. KleinOsowski, David J. Lilja
CAL
2002
14 years 8 days ago
Implementing Decay Techniques using 4T Quasi-Static Memory Cells
Abstract-This paper proposes the use of four-transistor (4T) cache and branch predictor array cell designs to address increasing worries regarding leakage power dissipation. While ...
Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin...
CAL
2002
14 years 8 days ago
Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example
Embedded systems commonly execute one program for their lifetime. Designing embedded system architectures with configurable components, such that those components can be tuned to t...
Ann Gordon-Ross, Susan Cotterell, Frank Vahid
CAL
2002
14 years 8 days ago
A Low Power TLB Structure for Embedded Systems
Jin-Hyuck Choi, Jung-Hoon Lee, Seh-Woong Jeong, Sh...