This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
In this paper, we describe a software architecture supporting code generation from within Ptolemy II. Ptolemy II is a componentbased design tool intended for embedded and real-tim...
We describe an automated environment to assist a system-on-achip designer to tune a microprocessor core to a particular application program that will run on the microprocessor, an...
Greg Stitt, Frank Vahid, Tony Givargis, Roman L. L...
Fragmentation can cause serious loss of memory in systems that are using dynamic memory management. Any useful memory management system must therefore provide means to limit fragm...
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...
This paper presents designs for parallel saturating multioperand adders. These adders have only a single carrypropagate adder on the critical delay path, yet produce the same resu...
Michael J. Schulte, Pablo I. Balzola, Jie Ruan, C....
Increasing of computation needs and improving of processor integration make the mapping of embedded real-time applications more and more expensive. PROMPT [1] provides a new appro...
Michel Barreteau, Juliette Mattioli, Thierry Grand...