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CDES
2006
96views Hardware» more  CDES 2006»
14 years 7 days ago
Bandwidth-Friendly Cache Hierarchy
Anasua Bhowmik, Mohamed M. Zahran
CDES
2006
76views Hardware» more  CDES 2006»
14 years 7 days ago
Novel NAND and AND Gate Using DNA Ligation and Two Transistors Implementations
Himanshu Thapliyal, A. Rameshwar, Rajnish Bajpai, ...
CDES
2006
99views Hardware» more  CDES 2006»
14 years 7 days ago
Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates
Multi-valued Fredkin gates (MVFG) are reversible gates and they can be considered as modified version of the better known reversible gate the Fredkin gate. Reversible logic gates ...
Amin Ahsan Ali, Hafiz Md. Hasan Babu, Ahsan Raja C...
CDES
2006
74views Hardware» more  CDES 2006»
14 years 7 days ago
Zero Detect-Based Low Power Registers File Access
- With the intention of reduce significantly the energy that wastes away when having a read or write access to the register file, since the technique Zero Detect diminishes the tra...
Moises Zarate, Oscar Camacho Nieto, Luis A. Villa ...
CDES
2006
149views Hardware» more  CDES 2006»
14 years 7 days ago
Crosstalk at the Dynamic Node of Domino CMOS Circuits
- The need for faster circuits in smaller area with lower power dissipation has made it a common practice to use the domino CMOS in high performance integrated circuits. However th...
Waleed Al-Assadi, Vipin Sharma, Pavankumar Chandra...
CDES
2006
62views Hardware» more  CDES 2006»
14 years 7 days ago
On the Management of Object Interrelationships
Still one of the main problems in computing security is the scope malicious intruders can gain by introducing their own thread of control. To make this worse, coarse grained struc...
Martin Uhl, Werner Held
CDES
2007
82views Hardware» more  CDES 2007»
14 years 9 days ago
Efficient Global Fault Collapsing for Combinational Library Modules
—Fault collapsing is the process of reducing the number of faults by using redundance and equivalence/dominance relationships among faults. Exact global fault collapsing can be e...
Hussain Al-Asaad
CDES
2007
143views Hardware» more  CDES 2007»
14 years 9 days ago
Compiling a Mechanical Nanocomputer Adder
- Computer component fabrication is approaching physical limits of traditional photolithographic fabrication techniques. An alternative computer architecture may be enabled by the ...
Thomas Way, Tao Tao
CDES
2007
81views Hardware» more  CDES 2007»
14 years 9 days ago
Parallel and Fault-Tolerant Routing in Nanoscale Spin-Wave Architectures
- In this paper, we present a number of parallel and fault-tolerant routing schemes for a set of nanoscale spin-wave architectures. The architectures considered here have several f...
Mary Mehrnoosh Eshaghian-Wilner, Shiva Navab