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FPL
2010
Springer
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13 years 9 months ago
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
Antonin Hermanek, Michal Kunes, Milan Tichý