DAC
2011
ACM
13 years 7 days ago
2011
ACM
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
ISCAS
2011
IEEE
13 years 4 months ago
2011
IEEE
—A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an a...
ASYNC
2002
IEEE
14 years 5 months ago
2002
IEEE
We present a method for synchronizing pausible clocks in GALS (Globally Asynchronous, Locally Synchronous) systems. In contrast to most conventional GALS schemes the method is not...