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CASES
2011
ACM
12 years 11 months ago
Architecting processors to allow voltage/reliability tradeoffs
Escalating variations in modern CMOS designs have become a threat to Moore’s law. While previous works have proposed techniques for tolerating variations by trading reliability ...
John Sartori, Rakesh Kumar
ISCAS
2002
IEEE
104views Hardware» more  ISCAS 2002»
14 years 4 months ago
High-speed add-compare-select units using locally self-resetting CMOS
This paper presents a new self-resetting CMOS design for an Add-Compare-Select (ACS) unit, which is a key building block in a Viterbi decoder. Static CMOS and two-phase domino CMO...
Gunok Jung, Jun Jin Kong, Gerald E. Sobelman, Kesh...