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IPPS
2006
IEEE
15 years 11 months ago
2006
IEEE
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
161
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IPPS
2006
IEEE
15 years 11 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...