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    ERSA
    2009
    146views Hardware» more  ERSA 2009»
    Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor
    14 years 5 months ago
    Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor
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    We present the architecture and programming model for MORA, a coarse-grained reconfigurable processor aimed at multimedia applications. The MORA architecure is a MIMD machine consi...
    Wim Vanderbauwhede, Martin Margala, Sai Rahul Chal...
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    VLSISP
    2008
    123views more  VLSISP 2008»
    Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
    14 years 7 months ago
    Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
    Download  trappist.elis.ugent.be
    ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
    Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
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