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EURODAC
1994
IEEE
148views VHDL» more  EURODAC 1994»
14 years 3 months ago
Design automation of self checking circuits
In this paper we explain the steps of the CAD tools developed for self checking circuits. The CAD tools developed are used to design Strongly Fault Secure, Strongly Code Disjoint ...
Sayed Mohammad Kia, Sri Parameswaran