Sciweavers

DAC
1990
ACM
13 years 11 months ago
Sequential Circuit Verification Using Symbolic Model Checking
Jerry R. Burch, Edmund M. Clarke, Kenneth L. McMil...
DAC
1989
ACM
13 years 11 months ago
Scheduling and Binding Algorithms for High-Level Synthesis
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
Pierre G. Paulin, John P. Knight
DAC
1989
ACM
13 years 11 months ago
Fast Hypergraph Partition
We present a new 0 (n2) heuristic for hypergraph min-cut bipartitioning, an important problem in circuit placement. Fastest previous methods for this problem are O(n2 log n). Our ...
Andrew B. Kahng
DAC
1989
ACM
13 years 11 months ago
A New Approach to the Rectilinear Steiner Tree Problem
: We discuss a new approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST). The main idea in ...
Jan-Ming Ho, Gopalakrishnan Vijayan, C. K. Wong
DAC
1989
ACM
13 years 11 months ago
Special Purpose Architecture for Accelerating Bitmap DRC
In this paper we propose algorithms for performing DRC on a bitmapped layout altd developspecial purpose architecture for its implementation. we Use window scan method, with flexib...
Narasimha B. Bhat, S. K. Nandy
DAC
1992
ACM
13 years 11 months ago
Synthesis from Production-Based Specifications
This paper describes a model for, and an implementation of, production-based synthesis of hardware description language (HDL) code in which the overall structure of the resultant ...
Andrew Seawright, Forrest Brewer