DAC
1999
ACM
13 years 11 months ago
1999
ACM
The increasing size and complexity of designs is making the use of hardware description languages (HDLs), such as Verilog and VHDL, more prevalent. They are able to describe both ...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
This paper describes a two-state methodology for register transfer level (RTL) logic simulation in which the use of the Xstate is completely eliminated inside ASIC designs. Exampl...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
At present there are two common types of integrated circuit inductor simulation tools. The first type is based on the Greenhouse methods[1], and obtains a solution in a fraction o...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
IC inductance extraction generally produces either port inductances based on simplified current path assumptions or a complete partial inductance matrix. Combining either of thes...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
DAC
1999
ACM
13 years 11 months ago
1999
ACM
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
DAC
1999
ACM
13 years 11 months ago
1999
ACM
Abstract We describe the use of parametric representations of Boolean predicates to encode data-space constraints and signi cantly extend the capacity of formal veri cation. The co...
DAC
2000
ACM
13 years 12 months ago
2000
ACM
