SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
The Kahn Process Network (KPN) model is a widely used modelof-computation to specify and map streaming applications onto multiprocessor systems-on-chips. In general, KPNs are difļ...
Using device write buffers is a promising technique to improve the write performance of solid-state disks. The write buffer not only reduces the write traffic to the flash but als...
Memory consistency litmus tests are small parallel programs that are designed to illustrate subtle diļ¬erences between memory consistency models by exhibiting diļ¬erent outcomes...
DVFS remains an important energy management technique for embedded systems. However, its negative impact on transient fault rates has been recently shown. In this paper, we propos...
We present ChronOS Linux, a best-eļ¬ort real-time Linux kernel for chip multiprocessors (CMPs). ChronOS addresses the intersection of three problem spaces: a) OS-support for obta...
Matthew Dellinger, Piyush Garyali, Binoy Ravindran
The deployment of computer vision algorithms in mobile applications is growing at a rapid pace. A primary component of the computer vision software pipeline is feature extraction,...
Jason Clemons, Andrew Jones, Robert Perricone, Sil...
In this work, we propose an efļ¬cient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...
Modern processor architectures call for software that is highly tuned to an unpredictable operating environment. Processlevel virtualization systems allow existing software to ada...
SystemC is a popular modeling language which can be used to specify systems at bstraction level. Currently, SystemC tools can not cope with SystemC models for which the module hie...