data cache behavior | Sciweavers

RTAS
2005
IEEE

191views Embedded Systems» more RTAS 2005»

Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns

14 years 5 months ago

While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...

Harini Ramaprasad, Frank Mueller

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RTAS
2006
IEEE

146views Embedded Systems» more RTAS 2006»

Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks

14 years 5 months ago

Download moss.csc.ncsu.edu

Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...

Harini Ramaprasad, Frank Mueller

claim paper

Read More »

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