Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns

While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and particularly data caches) limit the timing predictability for data accesses that may reside in memory or in cache. This is a significant problem for real-time systems. The objective our work is to provide accurate predictions of data cache behavior of scalar and non-scalar references whose reference patterns are known at compile time. Such knowledge about cache behavior provides the basis for significant improvements in bounding the worst-case execution time (WCET) of real-time programs, particularly for hardto-analyze data caches. We exploit the power of the Cache Miss Equations (CME) framework but lift a number of limitations of traditional CME to generalize the analysis to more arbitrary programs. We further devised a transformation, coined “forced” loop fusion, which facilitates the analysis across sequen...

• Type: Conference
• Year: 2005
• Where: RTAS
• Authors: Harini Ramaprasad, Frank Mueller
• Keywords: Cache Behavior, Data Cache, Data Cache Behavior, Real-Time Technology, RTAS 2005