Sciweavers

DATE
1998
IEEE
88views Hardware» more  DATE 1998»
14 years 3 months ago
Functional Scan Chain Testing
Functional scan chains are scan chains that have scan paths through a circuit's functional logic and flip-flops. Establishing functional scan paths by test point insertion (T...
Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-...
DATE
1998
IEEE
98views Hardware» more  DATE 1998»
14 years 3 months ago
AFTA: A Formal Delay Model for Functional Timing Analysis
Despite its importance, we find that a rigorous theoretical foundation for performing timing analysis has been lacking so far. As a result, we have initiated a research project th...
V. Chandramouli, Jesse Whittemore, Karem A. Sakall...
DATE
1998
IEEE
76views Hardware» more  DATE 1998»
14 years 3 months ago
Gated Clock Routing Minimizing the Switched Capacitance
This paper presents a zero-skew gated clock routing technique for VLSI circuits. The gated clock tree has masking gates at the internal nodes of the clock tree, which are selectiv...
Jaewon Oh, Massoud Pedram
DATE
1998
IEEE
89views Hardware» more  DATE 1998»
14 years 3 months ago
Characterization-Free Behavioral Power Modeling
We propose a new approach to RT-level power modeling for combinationalmacros, that does not require simulationbased characterization. A pattern-dependent power model for a macro i...
Alessandro Bogliolo, Luca Benini, Giovanni De Mich...
DATE
1998
IEEE
109views Hardware» more  DATE 1998»
14 years 3 months ago
Cross-Level Hierarchical High-Level Synthesis
This paper presents a new approach to cross-level hierarchical high-level synthesis. A methodology is presented, that supports the efficient synthesis of hierarchical specified sy...
Oliver Bringmann, Wolfgang Rosenstiel
DATE
1998
IEEE
141views Hardware» more  DATE 1998»
14 years 3 months ago
Address Bus Encoding Techniques for System-Level Power Optimization
The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I...
Luca Benini, Giovanni De Micheli, Donatella Sciuto...