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The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
Defects not described by conventional fault models are a challenge for state-of-the-art fault diagnosis techniques. The X-fault model has been introduced recently as a modeling te...
Ilia Polian, Kohei Miyase, Yusuke Nakamura, Seiji ...
— Testing SoC is a challenging task, especially when addressing complex and highfrequency devices. Among the different techniques that can be exploited, Software-Based Selft-Test...
Wilson J. Perez, Jaime Velasco-Medina, Danilo Ravo...
—A new FPGA implementation for adaptive median filters is proposed. Adaptive median filters exhibit better filtering properties than standard median filters; however, their i...
—Using analytical and simulation results, this paper presents comparative analyses between network on chip and shared-bus AMBA using real application traffic with MPEG-2 video d...
Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-H...
—Temperature has become an important issue in nowadays MPSoCs design due to the ever increasing power densities and huge energy consumption. This paper proposes a temperature-awa...
— Due to ever increasing design sizes more efficient tools for Automatic Test Pattern Generation (ATPG) are needed. Recently ATPG based on Boolean satisfiability (SAT) has been ...
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...
: We propose a simple and fast two-level minimization algorithm for completely specified functions in this paper. The algorithm is based on processing ternary trees. A ternary tree...