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30
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ASIACRYPT
2001
Springer
169
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Cryptology
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ASIACRYPT 2001
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A Compact Rijndael Hardware Architecture with S-Box Optimization
14 years 3 months ago
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www.iacr.org
Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji M...
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