Sciweavers

PATMOS
2005
Springer
14 years 5 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
CAMP
2005
IEEE
14 years 5 months ago
Bio-Inspired Computing Architectures: The Embryonics Approach
Abstract— The promise of next-generation computer technologies, such as nano-electronics, implies a number of serious alterations to the design flow of digital circuits. One of ...
Gianluca Tempesti, Daniel Mange, André Stau...
GECCO
2007
Springer
138views Optimization» more  GECCO 2007»
14 years 5 months ago
Reducing the number of transistors in digital circuits using gate-level evolutionary design
This paper shows that the evolutionary design of digital circuits which is conducted at the gate level is able to produce human-competitive circuits at the transistor level. In ad...
Zbysek Gajda, Lukás Sekanina
DAC
2007
ACM
15 years 15 days ago
NBTI-Aware Synthesis of Digital Circuits
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...