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    ISCAS
    2005
    IEEE
    165views Hardware» more  ISCAS 2005»
    An area-efficient and protected network interface for processing-in-memory systems
    14 years 5 months ago
    An area-efficient and protected network interface for processing-in-memory systems
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    Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...
    Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen,...
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