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33
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DSD
2007
IEEE
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DSD 2007
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Alternatives in Designing Level-Restoring Buffers for Interconnection Networks in Field-Programmable Gate Arrays
14 years 5 months ago
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Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
Scott Miller, Mihai Sima, Michael McGuire
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