ISLPED
1995
ACM
13 years 11 months ago
1995
ACM
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
GLVLSI
1997
IEEE
13 years 11 months ago
1997
IEEE
In a VHDL-based design flow for applicationspecific integrated circuits, VITAL provides a uniform methodology for developing ASIC libraries for signoff simulation. The VITAL Sta...