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ITC
2003
IEEE
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ITC 2003
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Instruction Based BIST for Board/System Level Test of External Memories and Internconnects
14 years 4 months ago
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ct This paper describes a general technique to test external memory/caches and memory interconnects using on-chip logic. Such a test methodology is expected to significantly reduc...
Olivier Caty, Ismet Bayraktaroglu, Amitava Majumda...
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