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ICCAD
2003
IEEE
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ICCAD 2003
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Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
14 years 10 months ago
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www.async.ece.utah.edu
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
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