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39
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TVLSI
2010
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Artificial Intelligence
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TVLSI 2010
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LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
13 years 7 months ago
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www.icims.csl.uiuc.edu
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
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