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    FPGA
    2008
    ACM
    168views FPGA» more  FPGA 2008»
    Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
    14 years 1 months ago
    Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
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    The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
    Alessandro Cevrero, Panagiotis Athanasopoulos, Had...
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    FPGA
    2008
    ACM
    155views FPGA» more  FPGA 2008»
    A novel FPGA logic block for improved arithmetic performance
    14 years 2 months ago
    A novel FPGA logic block for improved arithmetic performance
    Download  lap.epfl.ch
    To improve FPGA performance for arithmetic circuits, this paper proposes a new architecture for FPGA logic cells that includes a 6:2 compressor. The new cell features additional f...
    Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
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