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FPL
2007
Springer
106views Hardware» more  FPL 2007»
14 years 5 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...
FPL
2007
Springer
136views Hardware» more  FPL 2007»
14 years 5 months ago
A Load/Store Unit for a Memcpy Hardware Accelerator
Recently, a dedicated hardware accelerator was proposed that works in conjunction with caches found next to modern-day microprocessors, to speedup the commonly utilized memcpy ope...
Stamatis Vassiliadis, Filipa Duarte, Stephan Wong
FPL
2007
Springer
120views Hardware» more  FPL 2007»
14 years 5 months ago
Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
Yohei Hasegawa, Hideharu Amano
FPL
2007
Springer
125views Hardware» more  FPL 2007»
14 years 5 months ago
Run-time Partial Reconfiguration for Removal, Placement and Routing on the Virtex-II-Pro
Reconfigurable computing entails the utilization of a generalpurpose processor augmented with a reconfigurable hardware structure (usually an FPGA). Normally, a complete recon...
Stefan Raaijmakers, Stephan Wong
FPL
2007
Springer
111views Hardware» more  FPL 2007»
14 years 5 months ago
Adaptive Thermoregulation for Applications on Reconfigurable Devices
A biological organism’s ability to sense and adapt to its environment is essential to its survival. Likewise, environmentally aware computing systems avail themselves to a longe...
Phillip H. Jones, James Moscola, Young H. Cho, Joh...
FPL
2007
Springer
89views Hardware» more  FPL 2007»
14 years 5 months ago
Evolutionary Search Applied to Reconfigurable Analogue Control
The new breed of reconfigurable integrated circuits (ICs) offer switched-capacitor based analogue circuits whose functionality can be altered during run-time. Rapidly changing th...
Kester Clegg, Susan Stepney, Tim Clarke
FPL
2007
Springer
100views Hardware» more  FPL 2007»
14 years 5 months ago
Clock-Aware Placement for FPGAs
The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
Julien Lamoureux, Steven J. E. Wilton
FPL
2007
Springer
190views Hardware» more  FPL 2007»
14 years 5 months ago
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems
Today’s heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware. The design and implementation of thes...
Andreas Herrholz, Frank Oppenheimer, Philipp A. Ha...
FPL
2007
Springer
171views Hardware» more  FPL 2007»
14 years 5 months ago
A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP
Brandon Harris, Arpith C. Jacob, Joseph M. Lancast...