Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
Sci2ools
International Keyboard
Graphical Social Symbols
CSS3 Style Generator
OCR
Web Page to Image
Web Page to PDF
Merge PDF
Split PDF
Latex Equation Editor
Extract Images from PDF
Convert JPEG to PS
Convert Latex to Word
Convert Word to PDF
Image Converter
PDF Converter
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
36
click to vote
DAC
2010
ACM
185
views
Computer Architecture
»
more
DAC 2010
»
Eyecharts: constructive benchmarking of gate sizing heuristics
14 years 3 months ago
Download
vlsicad.ucsd.edu
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
Puneet Gupta, Andrew B. Kahng, Amarnath Kasibhatla...
claim paper
Read More »