GLVLSI
2007
IEEE
14 years 18 days ago
2007
IEEE
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
GLVLSI
2007
IEEE
14 years 18 days ago
2007
IEEE
Given a set of placed blocks, we present an algorithm that minimally spaces the blocks to ensure routability under several assumptions. By performing a binary search on total widt...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
Nanoscale crossbars built from nanowires can form high density memories and programmable logic devices. To integrate such nanoscale devices with other circuits, nanowire decoders ...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
he abstract and simple computation and communication mechanism in the synchronous computational model it is easy to simulate synchronous systems and to apply formal verification m...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE