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    2009
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    Data path Configuration Time Reduction for Run-time Reconfigurable Systems
    13 years 10 months ago
    Data path Configuration Time Reduction for Run-time Reconfigurable Systems
    Download  ce.et.tudelft.nl
    - The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
    Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabe...
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