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33
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ICCAD
1991
IEEE
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ICCAD 1991
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Extraction of Gate Level Models from Transistor Circuits by Four-Valued Symbolic Analysis
14 years 4 months ago
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reference.kfupm.edu.sa
The program TRANALYZE generates a gate-level representation of an MOS transistor circuit. The resulting model contains only four-valued unit and zero delay logic primitives, suita...
Randal E. Bryant
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