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ASPDAC
2008
ACM
65views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Statistical noise margin estimation for sub-threshold combinational circuits
Yu Pu, Jose de Jesus Pineda de Gyvez, Henk Corpora...
ASPDAC
2008
ACM
80views Hardware» more  ASPDAC 2008»
13 years 10 months ago
An innovative Steiner tree based approach for polygon partitioning
Yongqiang Lu, Qing Su, Jamil Kawa
ASPDAC
2008
ACM
95views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Statistical power profile correlation for realistic thermal estimation
At system level, the on-chip temperature depends both on power density and the thermal coupling with the neighboring regions. The problem of finding the right set of input power pr...
Love Singhal, Sejong Oh, Eli Bozorgzadeh
ASPDAC
2008
ACM
168views Hardware» more  ASPDAC 2008»
13 years 10 months ago
A fast two-pass HDL simulation with on-demand dump
- Simulation-based functional verification is characterized by two inherently conflicting targets: the signal visibility and simulation performance. Achieving a proper trade-off be...
Kyuho Shim, Youngrae Cho, Namdo Kim, Hyuncheol Bai...
ASPDAC
2008
ACM
107views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Full-chip thermal analysis for the early design stage via generalized integral transforms
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns ...
Pei-Yu Huang, Chih-Kang Lin, Yu-Min Lee
ASPDAC
2008
ACM
151views Hardware» more  ASPDAC 2008»
13 years 10 months ago
High performance current-mode differential logic
This paper presents a new logic style, named Current-Mode Differential logic (CMDL), that achieves both high operating speed and low power consumption. Inspired by the low-voltage ...
Ling Zhang, Jianhua Liu, Haikun Zhu, Chung-Kuan Ch...
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
ASPDAC
2008
ACM
89views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Efficient synthesis of compressor trees on FPGAs
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne