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ASAP
2008
IEEE
105views Hardware» more  ASAP 2008»
13 years 10 months ago
Fast custom instruction identification by convex subgraph enumeration
Automatic generation of custom instruction processors from high-level application descriptions enables fast design space exploration, while offering very favorable performance and...
Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. &Ou...
ASAP
2008
IEEE
199views Hardware» more  ASAP 2008»
13 years 10 months ago
An efficient method for evaluating polynomial and rational function approximations
In this paper we extend the domain of applicability of the E-method [7, 8], as a hardware-oriented method for evaluating elementary functions using polynomial and rational functio...
Nicolas Brisebarre, Sylvain Chevillard, Milos D. E...
ASAP
2008
IEEE
119views Hardware» more  ASAP 2008»
13 years 10 months ago
An FPGA architecture for CABAC decoding in manycore systems
Arithmetic coding is an efficient entropy compression method that achieves results close to the entropy limit and it is used in modern standards such as JPEG-2000 and H.264. Arith...
Roberto R. Osorio, Javier D. Bruguera
ASAP
2008
IEEE
120views Hardware» more  ASAP 2008»
13 years 10 months ago
Lightweight DMA management mechanisms for multiprocessors on FPGA
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
13 years 10 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...
ASAP
2008
IEEE
117views Hardware» more  ASAP 2008»
13 years 10 months ago
Reconfigurable acceleration of microphone array algorithms for speech enhancement
Microphone arrays play an important role in noise reduction and speech enhancement. Their algorithms are based on beamforming, which reduces the level of localized and ambient noi...
Ka Fai Cedric Yiu, Chun Hok Ho, Nedelko Grbic, Yao...
ARC
2008
Springer
99views Hardware» more  ARC 2008»
13 years 10 months ago
Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens
We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is consi...
Hagen Gädke, Andreas Koch
ARC
2008
Springer
95views Hardware» more  ARC 2008»
13 years 10 months ago
The Instruction-Set Extension Problem: A Survey
Over the last years, we have witnessed the increased use of Application-Specific Instruction-Set Processors (ASIPs). These ASIPs are processors that have a customizable instruction...
Carlo Galuzzi, Koen Bertels
ARC
2008
Springer
155views Hardware» more  ARC 2008»
13 years 10 months ago
Run-time Adaptable Architectures for Heterogeneous Behavior Embedded Systems
As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable archite...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...
ARC
2008
Springer
99views Hardware» more  ARC 2008»
13 years 10 months ago
Physical Design of FPGA Interconnect to Prevent Information Leakage
Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogv...