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CAV
2010
Springer
181views Hardware» more  CAV 2010»
14 years 18 days ago
Policy Monitoring in First-Order Temporal Logic
We present an approach to monitoring system policies. As a specification language, we use an expressive fragment of a temporal logic, which can be effectively monitored. We repor...
David A. Basin, Felix Klaedtke, Samuel Müller
CAV
2010
Springer
172views Hardware» more  CAV 2010»
14 years 18 days ago
Symbolic Bounded Synthesis
Abstract. Synthesis of finite state systems from full linear time temporal logic (LTL) specifications is gaining more and more attention as several recent achievements have signi...
Rüdiger Ehlers
CAV
2010
Springer
194views Hardware» more  CAV 2010»
14 years 18 days ago
LTSmin: Distributed and Symbolic Reachability
ions of ODE models (MAPLE, GNA). On the algorithmic side (Sec. 3.2), it supports two main streams in high-performance model checking: reachability analysis based on BDDs (symbolic)...
Stefan Blom, Jaco van de Pol, Michael Weber
CAV
2010
Springer
179views Hardware» more  CAV 2010»
14 years 18 days ago
Generating Litmus Tests for Contrasting Memory Consistency Models
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...
Sela Mador-Haim, Rajeev Alur, Milo M. K. Martin
CAV
2010
Springer
146views Hardware» more  CAV 2010»
14 years 18 days ago
Fast Acceleration of Ultimately Periodic Relations
Marius Bozga, Radu Iosif, Filip Konecný
CAV
2010
Springer
158views Hardware» more  CAV 2010»
14 years 18 days ago
Model-Checking Parameterized Concurrent Programs Using Linear Interfaces
Abstract. We consider the verification of parameterized Boolean proabstractions of shared-memory concurrent programs with an unbounded number of threads. We propose that such prog...
Salvatore La Torre, P. Madhusudan, Gennaro Parlato
CAV
2010
Springer
223views Hardware» more  CAV 2010»
14 years 18 days ago
RATSY - A New Requirements Analysis Tool with Synthesis
Formal specifications play an increasingly important role in system design-flows. Yet, they are not always easy to deal with. In this paper we present RATSY, a successor of the R...
Roderick Bloem, Alessandro Cimatti, Karin Greimel,...
CAV
2010
Springer
161views Hardware» more  CAV 2010»
14 years 18 days ago
Directed Proof Generation for Machine Code
We present the algorithms used in MCVETO (Machine-Code VErification TOol), a tool to check whether a stripped machinecode program satisfies a safety property. The verification p...
Aditya V. Thakur, Junghee Lim, Akash Lal, Amanda B...
CAV
2010
Springer
154views Hardware» more  CAV 2010»
14 years 18 days ago
Verifying Low-Level Implementations of High-Level Datatypes
For efficiency and portability, network packet processing code is typically written in low-level languages and makes use of bit-level operations to compactly represent data. Althou...
Christopher L. Conway, Clark Barrett
CAV
2010
Springer
251views Hardware» more  CAV 2010»
14 years 18 days ago
Automated Assume-Guarantee Reasoning through Implicit Learning
Abstract. We propose a purely implicit solution to the contextual assumption generation problem in assume-guarantee reasoning. Instead of improving the L∗ algorithm — a learnin...
Yu-Fang Chen, Edmund M. Clarke, Azadeh Farzan, Min...