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DATE
2009
IEEE
123views Hardware» more  DATE 2009»
14 years 17 days ago
Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis
This paper exploits the unique in-field controllability of the device polarity of ambipolar carbon nanotube field effect transistors (CNTFETs) to design a technology library with ...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
FPL
2007
Springer
97views Hardware» more  FPL 2007»
14 years 17 days ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
FPL
2007
Springer
150views Hardware» more  FPL 2007»
14 years 17 days ago
Discrete Event Simulation of Molecular Dynamics with Configurable Logic
: Molecular dynamics simulation based on discrete event simulation (DMD) is emerging as an alternative to time-step driven molecular dynamics (MD). DMD uses simplified discretized ...
Josh Model, Martin C. Herbordt
FPL
2007
Springer
122views Hardware» more  FPL 2007»
14 years 17 days ago
Efficient FPGA-based multipliers for F_3^97 and F_3^(6*97)
Jamshid Shokrollahi, Elisa Gorla, Christoph Puttma...
FPL
2007
Springer
99views Hardware» more  FPL 2007»
14 years 17 days ago
Disjoint Pattern Enumeration for Custom Instructions Identification
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
Pan Yu, Tulika Mitra
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 17 days ago
Efficient hardware checkpointing: concepts, overhead analysis, and implementation
Progress in reconfigurable hardware technology allows the implementation of complete SoCs in today's FPGAs. In the context design for reliability, software checkpointing is a...
Dirk Koch, Christian Haubelt, Jürgen Teich
SAT
2010
Springer
136views Hardware» more  SAT 2010»
14 years 17 days ago
A Non-prenex, Non-clausal QBF Solver with Game-State Learning
Abstract. We describe a DPLL-based solver for the problem of quantified boolean formulas (QBF) in non-prenex, non-CNF form. We make two contributions. First, we reformulate clause...
William Klieber, Samir Sapra, Sicun Gao, Edmund M....
SAT
2010
Springer
194views Hardware» more  SAT 2010»
14 years 17 days ago
Integrating Dependency Schemes in Search-Based QBF Solvers
Florian Lonsing, Armin Biere
SAT
2010
Springer
160views Hardware» more  SAT 2010»
14 years 17 days ago
Reconstructing Solutions after Blocked Clause Elimination
Abstract. Preprocessing has proven important in enabling efficient Boolean satisfiability (SAT) solving. For many real application scenarios of SAT it is important to be able to ...
Matti Järvisalo, Armin Biere