Sciweavers

FCCM
2006
IEEE
117views VLSI» more  FCCM 2006»
14 years 3 months ago
A Scalable Hybrid Regular Expression Pattern Matcher
James Moscola, Young H. Cho, John W. Lockwood
FCCM
2006
IEEE
136views VLSI» more  FCCM 2006»
14 years 3 months ago
Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs
Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bel...
FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
14 years 3 months ago
Scalable Hardware Architecture for Real-Time Dynamic Programming Applications
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
Brad Matthews, Itamar Elhanany
FCCM
2006
IEEE
195views VLSI» more  FCCM 2006»
14 years 3 months ago
A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2)
This paper presents a hardware-optimized variant of the well-known Gaussian elimination over GF(2) and its highly efficient implementation. The proposed hardware architecture, we...
Andrey Bogdanov, M. C. Mertens
FCCM
2006
IEEE
121views VLSI» more  FCCM 2006»
14 years 3 months ago
COPACOBANA A Cost-Optimized Special-Purpose Hardware for Code-Breaking
Sandeep Kumar, Christof Paar, Jan Pelzl, Gerd Pfei...
FCCM
2006
IEEE
131views VLSI» more  FCCM 2006»
14 years 3 months ago
Packet Switched vs. Time Multiplexed FPGA Overlay Networks
— Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited ...
Nachiket Kapre, Nikil Mehta, Michael DeLorimier, R...
FCCM
2006
IEEE
127views VLSI» more  FCCM 2006»
14 years 3 months ago
Scalable Softcore Vector Processor for Biosequence Applications
Arpith C. Jacob, Brandon Harris, Jeremy Buhler, Ro...
FCCM
2006
IEEE
120views VLSI» more  FCCM 2006»
14 years 3 months ago
FPGAs, GPUs and the PS2 - A Single Programming Methodology
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...